This is where my academics come into playHowever, I think weiss uses its internal clock at 195 khz ( Unlike 10 mhz usually found ), and samples everything to 195 khz to minimize possible jitter. I think with the Weiss the effect of the clock might be minimal. Thanks to kindly correct me if Iam wrong here.

In fact, I sent an email asking Daniel Weiss why he discontinued clock input after DAC202 and he told me that PLL on Weiss are very strict and so, they do not need external clock input to realize benefit of external clocks.